Analysis of parallel hierarchical matching schedulers for input-queued switches under different traffic conditions

  1. Gonzalez-Castano, F.J.
  2. Lopez-Bravo, C.
  3. Asorey-Cacheda, R.
Actas:
Proceedings - IEEE Symposium on Computers and Communications

ISSN: 1530-1346

ISBN: 9780769519616

Ano de publicación: 2003

Páxinas: 527-534

Tipo: Achega congreso

DOI: 10.1109/ISCC.2003.1214173 GOOGLE SCHOLAR