JUAN JOSE
RODRIGUEZ ANDINA
TITULAR DE UNIVERSIDADE - TEMPO COMPLETO
ENRIQUE
SOTO CAMPOS
TITULAR DE UNIVERSIDADE - TEMPO COMPLETO
Publications by the researcher in collaboration with ENRIQUE SOTO CAMPOS (8)
2009
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FPGA-based combinational implementation if the PHM scheduling algorithm
Actas de las IX Jornadas de computación reconfigurable y aplicaciones: Universidad de Alcalá, Departamento de Electrónica, Alcalá de Henares, 9-11 septiembre, 2009
2008
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Distortion mitigation in RF power amplifiers through FPGA-based amplitude and phase predistortion
IEEE Transactions on Industrial Electronics, Vol. 55, Núm. 11, pp. 4085-4093
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FPGA-based implementation of segmented predistorters for RF power amplifiers
IEEE International Symposium on Industrial Electronics
2007
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Reduction of intermodulation effects in power amplifiers through segmented predistortion
IEEE International Symposium on Industrial Electronics
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Study of FPGA implementations of scheduling algorithms for high-performance switches
IEEE International Symposium on Industrial Electronics
2006
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FPGA implementation of high-performance PHM / DPHM schedulers
Proceedings - 2006 International Conference on Field Programmable Logic and Applications, FPL
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Statistical detection of the faulty behaviour of islip-based schedulers for VOQ switches
IFAC Proceedings Volumes (IFAC-PapersOnline)
2005
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High-level modelling and detection of the faulty behaviour of VOQ switches under balanced traffic
Proceedings - DSD'2005: 8th Euromicro Conference on Digital System Design - Architectures, Methods and Tools