MARIA DOLORES
VALDES PEÑA
PROFESOR/A CONTRATADO/A DOUTOR/A A T.C.
Universidade de Lisboa
Lisboa, PortugalUniversidade de Lisboa-ko ikertzaileekin lankidetzan egindako argitalpenak (3)
2013
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Design and validation of configurable online aging sensors in nanometer-scale FPGAs
IEEE Transactions on Nanotechnology, Vol. 12, Núm. 4, pp. 508-517
2011
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Lower V DD operation of FPGA-based digital circuits through delay modeling and time borrowing
Journal of Low Power Electronics, Vol. 7, Núm. 2, pp. 185-198
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Performance failure prediction using built-in delay sensors in FPGAs
Proceedings - 21st International Conference on Field Programmable Logic and Applications, FPL 2011