MARIA DOLORES
VALDES PEÑA
PROFESOR/A CONTRATADO/A DOUTOR/A - TEMPO COMPLETO
Pontifícia Universidade Católica do Rio Grande do Sul
Porto Alegre, BrasilPublicacións en colaboración con investigadores/as de Pontifícia Universidade Católica do Rio Grande do Sul (7)
2013
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Aging monitoring with local sensors in FPGA-based designs
2013 23rd International Conference on Field Programmable Logic and Applications, FPL 2013 - Proceedings
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Design and validation of configurable online aging sensors in nanometer-scale FPGAs
IEEE Transactions on Nanotechnology, Vol. 12, Núm. 4, pp. 508-517
2011
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IP core to leverage RTOS-based embedded systems reliability to electromagnetic interference
Proceedings of the 8th International Workshop on Electromagnetic Compatibility of Integrated Circuits 2011, EMC COMPO 2011
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Lower V DD operation of FPGA-based digital circuits through delay modeling and time borrowing
Journal of Low Power Electronics, Vol. 7, Núm. 2, pp. 185-198
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Performance failure prediction using built-in delay sensors in FPGAs
Proceedings - 21st International Conference on Field Programmable Logic and Applications, FPL 2011
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Programmable sensor for on-line checking of signal integrity in FPGA-based systems subject to aging effects
LATW 2011 - 12th IEEE Latin-American Test Workshop
2010
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Delay modeling for power noise-aware design in Spartan-3A FPGAS
6th Southern Programmable Logic Conference, SPL 2010 - Proceedings