Neural parallel-hierarchical-matching scheduler for input-buffered packet switches

  1. González-Castaño, F.J.
  2. López-Bravo, C.
  3. Asorey-Cacheda, R.
  4. Pousada-Carballo, J.M.
  5. Rodríguez-Hernández, P.S.
Revue:
IEEE Communications Letters

ISSN: 1089-7798

Année de publication: 2002

Volumen: 6

Número: 5

Pages: 220-222

Type: Article

DOI: 10.1109/4234.1001670 GOOGLE SCHOLAR
La source de données: Scopus