Publicacións nas que colabora con LUCIA COSTAS PEREZ (2)

2011

  1. Lower V DD operation of FPGA-based digital circuits through delay modeling and time borrowing

    Journal of Low Power Electronics, Vol. 7, Núm. 2, pp. 185-198

2010

  1. Delay modeling for power noise-aware design in Spartan-3A FPGAS

    6th Southern Programmable Logic Conference, SPL 2010 - Proceedings