Publicacións en colaboración con investigadores/as de Universidade de Lisboa (15)

2019

  1. Assessment of spatial and temporal properties of Ka/Q band earth-space radio channel across Europe using Alphasat Aldo Paraboni payload

    International Journal of Satellite Communications and Networking, Vol. 37, Núm. 5, pp. 477-501

2017

  1. Large scale assessment of Ka/Q band atmospheric channel across Europe with ALPHASAT TDP5: The augmented network

    2017 11th European Conference on Antennas and Propagation, EUCAP 2017

2013

  1. Design and validation of configurable online aging sensors in nanometer-scale FPGAs

    IEEE Transactions on Nanotechnology, Vol. 12, Núm. 4, pp. 508-517

2012

  1. Modeling the effect of process, power-supply voltage and temperature variations on the timing response of nanometer digital circuits

    Journal of Electronic Testing: Theory and Applications (JETTA), Vol. 28, Núm. 4, pp. 421-434

2011

  1. Lower V DD operation of FPGA-based digital circuits through delay modeling and time borrowing

    Journal of Low Power Electronics, Vol. 7, Núm. 2, pp. 185-198

  2. Performance failure prediction using built-in delay sensors in FPGAs

    Proceedings - 21st International Conference on Field Programmable Logic and Applications, FPL 2011

2010

  1. Impact of power supply voltage variations on FPGA-based digital systems performance

    Journal of Low Power Electronics

  2. Investigating the use of BICS to detect resistive- open defects in SRAMs

    Proceedings of the 2010 IEEE 16th International On-Line Testing Symposium, IOLTS 2010

2009

  1. Delay-fault tolerance to power supply voltage disturbances analysis in nanometer technologies

    2009 15th IEEE International On-Line Testing Symposium, IOLTS 2009

2008

  1. Process tolerant design using thermal and power-supply tolerance in pipeline based circuits

    2008 IEEE WORKSHOP ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS, PROCEEDINGS

  2. Process tolerant design using thernal and power-supply tolerance in pipeline based circuits

    Proceedings - 2008 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, DDECS

  3. Time Management for Low-Power Design of Digital Systems

    Journal of Low Power Electronics, Vol. 4, Núm. 3, pp. 410-419

2007

  1. Improving tolerance to power-supply and temperature variations in synchronous circuits

    Proceedings of the 2007 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, DDECS

  2. On-line dynamic delay insertion to improve signal integrity in synchronous circuits

    Proceedings - IOLTS 2007 13th IEEE International On-Line Testing Symposium

2006

  1. Dynamic fault detection in digital systems using dynamic voltage scaling and multi-temperature schemes

    Proceedings - IOLTS 2006: 12th IEEE International On-Line Testing Symposium